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Digital I/O


  • IP-OctalSerial: (from Dynamic Engineering)
    IP-OctalSerial-IO is a Multi-channel Serial or Parallel communications and control interface. Each of the 8 channels has FIFO support. A total of 24 - 40 MHz rated RS-485 IO with programmable terminations are provided for complete flexibility with custom requirements. Programmable interrupts and status. The IP interface supports 8 and 32 MHz operation. The FIFOs are supported with a write through pipeline and early termination for the TX channels and a fast read capability on the RX channels for high performance. The TX FIFOs can be loaded in parallel if the same data set is to be sent via multiple channels.

  • IP-OptoISO-16: (from Dynamic Engineering)
    16 Optically Isolated High Voltage outputs IP-OptoISO-16 is an IndustryPack® Module with 16 optically controlled FET switches. Each FET acts as a single pole normally open photo-voltaic relay. The solid state approach has several advantages including bounce free operation, low on resistance, long life, fast switching, and higher reliability when compared to relays. Each optical switch operates independently.

  • IP-Parallel-485: (from Dynamic Engineering)
    24 differential pairs

  • IP-Parallel-IO: (from Dynamic Engineering)
    IP-Parallel-IO adds up to 48 digital / 24 differential IO. IO's can be custom configured to be TTL or RS485 compatible in several combinations - A real space saver for systems with both types of IO. Each channel is programmable to be an input or an output on a channel-by-channel basis via software. All 48 IO channels can be used as interrupt generators. Interrupts are programmable to be enabled, active high or low, and edge or level triggered. TTL Outputs are driven with 64 mA open-drain devices to allow multi-drop applications. A 470 ohm pull-up resistor is provided on board. An external oscillator position is provided for custom situations. Two programmable 32 bit counter/timers are provided. Our readily available versions are:

  • IP-Parallel-IO-1: (from Dynamic Engineering)
    40 TTL IO and 4 differential pairs

  • IP-Parallel-IO-2: (from Dynamic Engineering)
    32 TTL IO and 8 differential pairs

  • IP-Parallel-IO-3: (from Dynamic Engineering)
    24 TTL IO and 12 differential pairs

  • IP-Parallel-IO-4: (from Dynamic Engineering)
    16 TTL IO and 16 differential pairs

  • IP-Parallel-IO-5: (from Dynamic Engineering)
    8 TTL IO and 20 differential pairs

  • IP-Parallel-IO-CDU: (from Dynamic Engineering)
    CDU looping

  • IP-QuadUART-485: (from Dynamic Engineering)
    he IndustryPack compatible IP-QuadUART design integrates a quad UART onto an IndustryPack module. The UART (16C854) features 128 byte FIFOs for RX and TX ports on each channel. The UART is supported by an advanced IP module interface implemented within a Xilinx FPGA.
    The UART is a character based interface [8 bits]. The IndustryPack interface has several features which optimize performance. Words can be written to the IP-QuadUART and the data will be converted to bytes before being sent to the UART. The IP interface will latch the data allowing the host computer to be released while the data is being moved to the UART. The early release allows pipelined operation and increased performance. When the IP-QuadUART is mounted to a carrier which supports 32 bit operations the effect can be enhanced. The PCI3IP and PCI5IP support 32 bit access to IndustryPacks

  • IP-Tape: (from Dynamic Engineering)
    The IndustryPack compatible IP-Tape design adds 48 digital parallel IO lines to one slot of your carrier board. The IO is dedicated to a DTC interface. Other interfaces can be implemented. The DTC interface has 22 Address, 16 Data plus Parity, 4 control and 5 status lines. Parity is automatically generated in write mode and checked in read mode. Parity is programmable to be old or even. Outputs in "tape" mode are driven with 64 mA open-drain devices. A 470 ohm pull-up resistor is provided on board. The registers are mapped as 16 bit words and are read-writeable. The Timing can be altered with a change to the state-machine for other implementations. The state machine has counters to create the delays for each state. In this design, the counters are set to wait 4.5 uS after address is asserted to assert Address Enable [ENABLEn], then 1.5 uS before asserting Data Enable [DTC_ENA]. RW is asserted with ENABLEn. RW is high as a default and for read accesses. RW is asserted low for a write cycle. The Global enable [DTC_DECn] is asserted at the start of the cycle. The IP-Parallel-Tape and its engineering kit are now available for ordering

    Send in your specifications and we can quote a custom version for you. Sales@dyneng.com (831) 336-8891.

  • IP Crypto: (from Dynamic Engineering)
    Use the IP Crypto for your control, avionics and robotics applications. The IP Crypto is a special version of the IP-Parallel-HV. The basic design features are retained and an interface to a KYK-13 is provided. The KYK-13 interface uses the 6.5V reference output, a transfer request output, and 3 inputs for clock, data and switch. The outputs for the general purpose section are reduced to 23 in number. The inputs are all available through the filter or after processing by the KYK-13 interface.
    The standard IP Parallel HV is a High Voltage IP Compatible card with 48 programmable IO. 40 mA sink. Open collector interface. Interrupt generator on each input channel. filtered or direct input. The IndustryPack compatible IP-Parallel-HV design can handle up to 30V external signals. The standard card configuration is a 6.5V reference and the ability to supply an external reference. Other voltages are available.
    Perfect for your embedded control.

  • IP Parallel HV: (from Dynamic Engineering)
    Use the IP Parallel HV for your control, avionics and robotics applications. High Voltage IP Compatible card with 48 programmable IO. 40 mA sink. Open collector interface. Interrupt generator on each input channel. filtered or direct input. The IndustryPack compatible IP-Parallel-HV design can handle up to 30V external signals. The standard card configuration is a 6.5V reference and the ability to supply an external reference. Other voltages are available. Use the IP Parallel HV for your control, avionics and robotics applications. Perfect for your embedded control applications.

  • IP PULSE: (from Dynamic Engineering)
    IP-Pulse<BR>4 independent programmable pulse generators <BR>The IndustryPack compatible IP-Pulse features 4 independent programmable pulse generators. The outputs can be configured to be TTL /CMOS or RS422/485 compatible in several combinations. A real space saver for systems with both types of IO. Perfect for your embedded control applications.

  • IP-68332: (from SBS Technologies)
    Intelligent timing and task controller IP with on-board 68332 processor and 96K X 16 dual-port SRAM. 16 channels of programmable timer counter. Two serial ports.

  • IP-Altera: (from SBS Technologies)
    28 lines digital I/O with complete Altera design file-set for custom I/O requirements. Uses 10K40-3 Altera FPGA, 20 Differential and 8 TTL lines. Supports 8 or 32 MHz IP Spec, DMA.

  • IP-Digital 24: (from SBS Technologies)
    TTL Level Digital I/O, 24-channel TTL input and output, programmable bits, supports RMW, bit set/reset, 64mA sink.

  • IP-Digital 48: (from SBS Technologies)
    TTL Level Digital I/O, Two MC68230s for 48 programmable bits, two 24-bit timers, multiple interrupt configurations.

  • IP-Driver 40: (from SBS Technologies)
    Low-Side Switches, 40 high current, open drain, low-side FET drivers, 1A per channel, 48VDS (Off), .13 Ohm (On).

  • IP-Dual PI/T: (from SBS Technologies)
    Programmable Timers, Two MC68230s for timers/interface, 68230 includes two 8bit or one 16bit programmable port, two 24-bit timers.

  • IP-HSPIO: (from SBS Technologies)
    Bi-Directional Buffered Data Movement, Bi-directional 16-bit wide, FIFO buffered data transfer capability between carrier and external device.

  • IP-Opto 22: (from SBS Technologies)
    OPTO 22 Panel Driver, 24 channel TTL input/output to drive OPTO-22 panels, programmable bits, 64mA sink.

  • IP-Opto Driver: (from SBS Technologies)
    Optically Isolated High-Side Switches, 16 channels optically isolated high-side drivers for relays, 'valves, lamps, outputs 1A at 48VDC.

  • IP-Opto Interrupter: (from SBS Technologies)
    Optically Isolated Switch Inputs, 8 channels optically coupled debounced switch inputs, Interrupt programmable all lines.

  • IP-Parallel-IO-CDU: (from Dynamic Engineering)
    CDU looping

  • IP-PWI: (from SBS Technologies)
    Pulse Width Input Measurement, 3 channel pulse-width input, 8.3ns resolution, RS422, 18-bit depth, use with Temposonics transducers.

  • IP-Quadrature: (from SBS Technologies)
    Counter, 4 24-bit counter/timer channels, DC to 10MHz, Interrupts, On-the-fly, up, down, quadrature.

  • IP-Relay: (from SBS Technologies)
    Relays, 8 independent C-form relays, configurable as dual 8-channel MUX or single 16-channel MUX.

  • IP-TTL48: (from SBS Technologies)
    48-line TTL digital I/O lines with 8 MHz and 32 MHz IP bus transfer. Grouped into six banks, each each can be dynamic programmable as input or output. Two lines can be set as interrupt request lines.

  • IP-Unidig: (from SBS Technologies)
    Buffered TTL Level Digital I/O, Up to 24 channels of double buffered TTL I/O w/64mA sink, +15/-5V voltage input, Commercial or Ext. Temp versions

  • IP-Unidig-D: (from SBS Technologies)
    Differential I/O, Up to 24 channels of differential I/O w/EIA422 interface, double buffered, Commercial or Ext. Temp versions

  • IP-Unidig-E: (from SBS Technologies)
    TTL Level Digital I/O, Up to 24 channels w/ESD protection circuitry, Commercial or Ext. Temp versions

  • IP-Unidig-E-48: (from SBS Technologies)
    48 channels of digital I/O with LineSafe ESD protection circuitry. TTL Level. Each bit dynamically programmable as input or output. Double buffered option for simultaneous operation. Master/Slave Mode for synchronizing multiple IPs.

  • IP-Unidig-HV: (from SBS Technologies)
    High Voltage I/O, Up to 16 In / 8 Out or 8 In / 16 Out high voltage I/O, output sinks 2A, off-state voltage up to 50V, differential inputs to 100V, Commercial or Ext. Temp versions

  • IP-Unidig-I: (from SBS Technologies)
    Buffered TTL Level Digital I/O, Up to 24 channels of double buffered TTL I/O w/64mA sink, +15/-5V voltage input and interrupts, Commercial or Ext. Temp versions

  • IP-Unidig-I-D: (from SBS Technologies)
    Differential I/O, Up to 24 channels of differential I/O w/EIA422 interface and interrupts, double buffered, Commercial or Ext. Temp versions

  • IP-Unidig-I-E: (from SBS Technologies)
    TTL Level Digital I/O, Up to 24 channels w/ESD protection circuitry and interrupts, Commercial or Ext. Temp versions

  • IP-Unidig-I-HV: (from SBS Technologies)
    High Voltage I/O, Up to 16 In / 8 Out or 8 In / 16 Out high voltage I/O w/interrupts, output sinks 2A, off-state voltage up to 50V, differential inputs to 100V, Commercial or Ext. Temp versions

  • IP-Unidig-I-O: (from SBS Technologies)
    Optically Isolated I/O, Up to 24 I/O w/isolation of 2500V and interrupts, transfer up to 1MB/s, double buffered, Commercial or Ext. Temp versions

  • IP-Unidig-O: (from SBS Technologies)
    Optically Isolated I/O, Up to 24 I/O w/isolation of 2500V, transfer up to 1MB/s, double buffered, Commercial or Ext. Temp versions

  • IP-Unidig-P: (from SBS Technologies)
    16-bit parallel digital I/O w/ handshaking. Sink up to 64mA w/ +15/ -5V input. Supports DMA

  • IP-Unidig-P-D: (from SBS Technologies)
    16-bit parallel digital I/O w/ handshaking. EIA-422 interface. Extended common mode range of +12/ -7V input, Supports DMA

  • IP-Unidig-T: (from SBS Technologies)
    Buffered Counter/Timer, Up to 4 channels of 16bit or 2 channels of 32bit buffered count down timers, clock from 1-10MHz, Commercial or Ext. Temp versions

  • IP-Unidig-T-D: (from SBS Technologies)
    Differential I/O, Up to 4 channels of 16bit or 2 channls of 32bit differential count down timers w/EIA422 interface, clock from 1-10MHz, Commercial or Ext. Temp versions

  • IP-Watchdog: (from SBS Technologies)
    Watchdog Timer/Voltage Monitor, 10 digital I/O lines w/interrupt, 24mA sink current, Telecom voltage monitor, programmable timer.

  • IP-Xilinx-422: (from SBS Technologies)
    Differential EIA-422- Level Digital I/O. Up to 24 lines. One empty Xilinx 3042 chip for custom digital interface

  • IP-Xilinx-Buf: (from SBS Technologies)
    Buffered TTL w /64mA sink Digital I/O. Up to 24 lines w/ +15/ -5V input. One empty Xilinx 3041 chip for custom digital interface

  • IP-Xilinx-ESD: (from SBS Technologies)
    TTL Level Digital I/O. Up to 25 lines w/ESD protection circuitry. One empty Xilinx 3042 chip for custom digital interface

  • IP-Xilinx-XX-422: (from SBS Technologies)
    Differential EIA-422 Level Digital I/O. Up to 24 lines. 2 empty, Xilinx 3042 chips for custom digital interface

  • IP-Xilinx-XX-Buf: (from SBS Technologies)
    Buffered TTL w/64mA sink Digital I/O. Up to 24 lines w/+ 15/ 5V input. 2 empty Xilinx 3041chips for custom digital interface

  • IP-Xilinx-XX-ESD: (from SBS Technologies)
    TTL Level Digital I/O, Up to 25 lines w/ESD protection circuitry. 2 empty Xilinx 3042 chips for custom digital interface

  • IPM-DIO-48: (from Max Technologies)
    Up to 48 open collector I/O (50V max @ 20 mA). Input threshold set at 14 Volts with 2 Volts hysterisis for clean detection of 28V logic signals. Used in Aviation. Individual programmable signal direction. Separate input feedback. Each pin can generate an interrupt on a edge or a logic level. One uS 32 bit timer can be used to generate timetag to events.

  • MVIP340/MVIP341: (from Motorola Inc., Embedded Communications Computing)
    Digital Interface Module. The MVIP340 and MVIP341 implement extremely high density digital I/O. They are two IndustryPack® configurations built from the same hardware. Both use two MC68230 programmable interface/timer chips to implement a wide range of interface options.

  • MVIP521: (from Motorola Inc., Embedded Communications Computing)
    Digital I/O Opto 22 Interface Module. Motorola's MVIP521 provides flexible input/output support for 24 signals. Each signal can be dynamically designated as an input or output. Signal drivers are socketed and can be changed in the field to support such interfaces as TTL high current (to 64mA), CMOS, open collector, and direct relay drive. The unit uses output latches with internal read-back for verification. A user programmable PLD is provided for advanced interrupt support. This module is plug compatible with OPTO 22 direct I/O isolation panels.

  • TIP600-10: (from TEWS TECHNOLGIES GmbH)
    16 digital inputs, 24V DC, optically isolated; Fully programmable interrupt capabilities; Electron. Debounce; Operating Temperature 0°C to +70°C

  • TIP605-10: (from TEWS TECHNOLGIES GmbH)
    16 digital inputs, 24V DC, optically isolated; Fully programmable interrupt capabilities; Electron. Debounce; Operating temperature -40 °C to +85 °C

  • TIP606-10: (from TEWS TECHNOLGIES GmbH)
    16 digital inputs designed for avionic applications, Input voltage typ. 28V, max 42V, optically isolated; Differential high impedance input ( typ. 118 kohms); Input threshold for High Level typ. >14V; Input threshold for Low Level typ. <3,5V; Fully programmable interrupt capabilities; Electron. Debounce; Operating Temperature -40°C to +85°C

  • TIP610-10: (from TEWS TECHNOLGIES GmbH)
    20 digital TTL I/O´s based on Zilog Z8536 controller arranged as two 8-bit I/O ports and a 4-bit control port; Operating Temperature 0°C to +70°C

  • TIP620-10: (from TEWS TECHNOLGIES GmbH)
    48 TTL I/O IP Module emulating two Motorola MC68230; 48 general purpose TTL I/O lines; ESD and overvoltage protection for each I/O line; Operating temperature -40°C to +85°C

  • TIP620-11: (from TEWS TECHNOLGIES GmbH)
    Dual PIT IP emulating two MC68230 emulating two Motorola MC68230; 32 I/O lines plus 8 handshake lines; supports timer, interrupts and double buffered data transfer with hardware handshake; ESD and overvoltage protection for each I/O line; Operating temperature -40°C to +85°C

  • TIP630-10: (from TEWS TECHNOLGIES GmbH)
    Reconfigurable FPGA with 48 TTL I/O, individually programmable as input, output, tri-state I/O; 6 pull up resistor networks (selectable pull up voltage +3.3V or 5V), ESD and overvoltage protection for each I/O line; Xilinx XC2S200-5 SpartanII FPGA logic configurable via IP bus or optional by PROM XC17S200APD8I; FPGA clock options: IP bus clock (8 or 32 MHz) / Local 32 MHz clock oscillator / PLL programmable clock generator CY22150 (250 MHz -166 MHz), 2 clock outputs connected to FPGA; Operating temperature -40°C to +85°C

  • TIP670-10: (from TEWS TECHNOLGIES GmbH)
    8 digital inputs, 24V DC, optically isolated, fully programmable interrupt capabilities, electron. debounce; 8 digital outputs, 24V DC 0.5 A, optically isolated; Channels are isolated against each other in sets of two; Each channel can be configured as high side switch or as low side switch; Overload and short circuit protection; Operating Temperature 0°C to +70°C

  • TIP670-20: (from TEWS TECHNOLGIES GmbH)
    4 digital inputs, 24V DC, optically isolated, fully programmable interrupt capabilities, electron. debounce; 4 digital outputs, 24V DC 0.5 A, optically isolated; Channels are isolated against each other in sets of two; Each channel can be configured as high side switch or as low side switch; Overload and short circuit protection; Operating Temperature 0°C to +70°C

  • TIP672-10: (from TEWS TECHNOLGIES GmbH)
    24 digital I/O lines with differential EIA-422 / EIA-485 compatible ESD protected line driver / receiver; I/O lines individually programmable as input or output; Full interrupt capability on inputs; Six 4 x 120ohms resistor networks mounted in sockets for I/O line termination; Programmable simultaneous update feature by external clock source (TTL level); Operating temperature range 0°C to +70°C

  • TIP675-10: (from TEWS TECHNOLGIES GmbH)
    48 digital TTL tri-state I/O lines with pull up resistors; I/O lines individually programmable as input or output; Full interrupt capability on inputs; Electronic debounce circuit for interrupt; ESD and overvoltage protection; Resistor networks mounted in sockets as I/O line pull up; Programmable simultaneous update feature by external clock source (TTL level); Operating temperature -40°C to +85°C

  • TIP700-10: (from TEWS TECHNOLGIES GmbH)
    16 digital outputs, 24V DC 0.5 A, optically isolated; Channels are isolated against each other in sets of two; Each channel can be configured as high side switch or as low side switch; Overload and short circuit protection; Operating Temperature 0°C to +70°C

  • TIP700-20: (from TEWS TECHNOLGIES GmbH)
    8 digital outputs, 24V DC 0.5 A, optically isolated; Channels are isolated against each other in sets of two; Each channel can be configured as high side switch or as low side switch; Overload and short circuit protection; Operating Temperature 0°C to +70°C

  • TIP710-10: (from TEWS TECHNOLGIES GmbH)
    16 digital outputs, high side switch; Output signal voltage 6V to 48V, common to all outputs, externally supplied; Output current: 1A continuous per channel; Optocouplers for galvanic isolation of outputs to computer system, Overload and short circuit protection; Watchdog timer resets all channels in case of triggering failure; Operating temperature -40°C to +85°C